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2
4
6
8
10 12 14 16 18 20
1
3
5
7
9
11 13 15 17 19
Front view at ISP connector of programmer.
H/L/read driver
A)
pins 3, 5, 7, 9, 11, 13 of ISP connector
B)
pin 14 of ISP connector
drivers in programmer
pin of ISP
connector
drivers in programmer
VCC
pin of ISP
connector
H/L
Float
RA1
RB2
Read
Pull-up/
Pull-down
C)
RA2
RA3
pins 15, 16 of ISP connector
D)
RB1
GND
YES!
H/L
drivers in programmer
CC1
pin of ISP
connector
RD1
pin of ISP
connector
Float
RC1
GND
Read
Pull-up/
Pull-down
RC2
E)
H/L
CE1
pin of ISP
connector
RE1
RA1 180R, RA2 1k3, RA3 22k,
RB1 10k, RB2 10k,
CC1 1n, RC1 1k3, RC2 22k,
RD1 22k, CE1 1n, RE1 1k3,
Comment to above picture:
picture C) Connection of pins 15 and 16 when are configured as logical signal needed for ISP
programming
pictures D) E) When pins 15 and 16 are configured as status of LED OK and LED ERROR
picture D) before first action with desired ISP device
picture E) after first action with desired ISP device
Notes: When LED OK or LED ERROR ON (shine), this status is presented as logical H, level
of H is 1,8V - 5V depend on H level of desired ISP device.
When LED OK or LED ERROR OFF (not shine), this status is presented as logical L, level of
L is 0V - 0,4V.
The above mentioned values are provided to understand (and also to exactly calculate) the
value of resistors, which isolate (separate) the programmed chip and target system.
19
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